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dual-channel isolators with iso power integrated dc-to-dc converter, 50 mw data sheet adum5240/adum5241/adum5242 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007C2012 analog devices, inc. all rights reserved. features integrated isolated dc-to-dc converter regulated 5 v/10 ma output dual dc to 1 mbps (nrz) signal isolation channels narrow-body, 8-lead soic package rohs compliant high temperature operation: 105c precise timing characteristics 3 ns maximum pulse width distortion 3 ns maximum channel-to-channel matching 70 ns maximum propagation delay high common-mode transient immunity: >25 kv/s safety and regulatory approvals ul recognition 2500 v rms for 1 minute, per ul 1577 csa component acceptance notice #5a vde certificate of conformity din v vde v 0884-10 (vde v 0884-10):2006-12 v iorm = 560 v peak general description the adum524x 1 are dual-channel digital isolators with iso power? integrated, isolated power. based on the analog devices, inc., i coupler? technology, a chip scale dc-to-dc converter provides up to 50 mw of regulated, isolated power at 5 v, which eliminates the need for a separate isolated dc-to-dc converter in low power isolated designs. the analog devices chip scale transformer i coupler technology is used both for the isolation of the logic signals as well as for the dc-to-dc converter. the result is a small form factor, total isolation solution. the adum524x isolators provide two independent isolation channels in a variety of channel configurations, operating from a 5 v input supply. adum524x units can be used in combination with other i coupler products to achieve greater channel counts. functional block diagrams 06014-001 gnd 4 gnd iso 5 v ia 2 v oa 7 decode encode v ib 3 v ob 6 decode encode v dd 1 v iso 8 osc. reg. rect. figure 1. adum5240 06014-002 gnd 4 gnd iso 5 v oa 2 v ia 7 encode decode v ib 3 v ob 6 decode encode v dd 1 v iso 8 osc. reg. rect. figure 2. adum5241 06014-003 gnd 4 gnd iso 5 v oa 2 v ia 7 encode decode encode decode v ob 3 v ib 6 v dd 1 v iso 8 osc. reg. rect. figure 3. adum5242 1 protected by u.s. patents 5,952,849; 6,873,065; and 7,075,329.
adum5240/adum5241/adum5242 data sheet rev. b | page 2 of 16 table of contents features .............................................................................................. 1 general description ......................................................................... 1 functional block diagrams ............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics ............................................................. 3 package characteristics ............................................................... 5 regulatory information ............................................................... 5 insulation and safety - related specifications ............................ 5 din v vde v 0884 - 10 (vde v 0884 - 10) insulation characteristics .............................................................................. 6 recommended operating conditions ...................................... 6 absolute maximum ratings ............................................................ 7 esd caution ...................................................................................7 pin configurations and function descriptions ............................8 typical performance characteristics ........................................... 10 applications information .............................................................. 11 dc - to - dc converter ................................................................. 11 propagation delay - related parameters ................................... 11 dc correctness and magnetic field immunity ..................... 11 thermal analysis ....................................................................... 12 pcb layout ................................................................................. 12 increasing available power ....................................................... 13 insulation lifetime ..................................................................... 13 outline dimensions ....................................................................... 14 ordering guide .......................................................................... 14 revision h istory 5 / 12 rev. a to rev. b created hyperlink for safety and regulatory approvals entry in features section ................................................................. 1 change to pcb layout section ..................................................... 1 2 7 /07 rev. 0 to rev. a updated vde certification throughout ...................................... 1 changes to features .......................................................................... 1 change s to regulatory inform ation section and table 4 ........... 5 changes to table 5 and figure 4 caption ...................................... 6 changes to table 7 ............................................................................ 7 added table 8; renumbered sequentially .................................... 7 added insulation lifetime section .............................................. 13 3/07 rev ision 0: initial version
data sheet adum5240/adum5241/adum5242 rev. b | page 3 of 16 specifications electrical character istics all voltag es are relative to their respective ground. all min imum /max imum specifications apply over the entire recommended operating range, unless otherwise noted. all typical specifications are at t a = 25c, v dd = 5.0 v, v iso = 5.0 v, unless otherwise noted. table 1 . parameter symbol min typ max unit test conditions dc - to - dc converter dc - to - dc converter enabled dc to 1 mbps data rate logic signal freq uency 1 mhz setpoint v iso (set) 4.5 5.2 5.5 v i iso = 0 ma maximum v iso output current i iso (max) 10 ma v iso = 4.5 v noise 1 250 mv p - p input supply current at maximum i iso current i dd (max) 1 4 0 ma i iso = 10 ma no load i iso current i dd (q) 104 ma i iso = 0 ma dc -to - dc converter disabled primary side supply input current 2 adum5240 i dd (disable) 3.3 ma v dd = 4.0 v adum5241 i dd (disable) 2.7 ma v dd = 4.0 v adum5242 i dd (disable) 2.2 ma v dd = 4.0 v secondary side supply i nput current 3 adum5240 i iso (disable) 2.6 ma adum5241 i iso (disable) 2.8 ma adum5242 i iso (disable) 3.0 ma dc -to - dc converter enable threshold 4 v dd (enable) 4.2 4.5 v dc - to - dc converter disable threshold 4 v dd (disable) 3.7 v logic specifications logic input currents i ia , i ib ?10 +0.01 +10 a logic high input threshold v ih 0.7 (v dd or v iso ) v logic low input threshold v il 0.3 (v dd or v iso ) v logic high output voltage s v oah , v obh (v dd or v iso ) ? 0.1 ( v dd or v iso ) v i ox = ?20 a, v ix v ih (v dd or v iso ) ? 0.5 (v dd or v iso ) ? 0.2 v i ox = ?4 ma, v ix v ih logic low output voltages v oal , v obl 0.0 0.1 v i ox = 20 a, v ix v il 0.0 0.4 v i ox = 4 ma, v ix v il
adum5240/adum5241/adum5242 data sheet rev. b | page 4 of 16 parameter symbol min typ max unit test conditions ac specifications minimum pulse width 5 pw 100 ns c l = 15 pf, cmos signal levels maximum data rate 6 1 mbps c l = 15 pf, cmos signal levels propagation delay 7 t phl , t plh 25 70 ns c l = 15 pf, cmos signal levels pulse width distortion, |t plh ? t phl | 8 pwd 3 ns c l = 15 pf, cmos signal levels propagation delay skew 8 t psk 45 ns c l = 15 pf, cmos signal levels channel - to - channel matching, codirectional channels 9 t pskcd 3 ns c l = 15 pf, cmos signal levels channel - to - channel matching, opposing - directional channels 9 t pskcd 15 ns c l = 15 pf, cmos signal levels out put rise/fall time (10% to 90%) t r /t f 2.5 n s c l = 15 pf, cmos signal levels co mmon - mode transient immunity at logic high output |cm h | 25 35 kv/s v ix = v dd , v iso , v cm = 1000 v, transient magnitude = 800 v common - mode transient immunity at logic low output |cm l | 25 35 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v r efresh frequency f r 1.0 mhz switching frequency f osc 300 mhz 1 peak noise occurs at frequency corresponding to the refresh frequency (see the pcb layout section). 2 i dd (disable) supply current values are specified with no load present on the digital outputs. 3 i iso (disable) supply current values are specified with no load present on the digital outputs and power sourced by an external supply. 4 enable/disable threshold is the v dd voltage at which the internal dc - to - dc converter is enabled/disabled. 5 the minimum pulse width is the shortes t pulse width at which the specified pulse width distortion is guaranteed. 6 the maximum data rate is the fastest data rate at which the specified pulse width distortion and v iso supply voltage is guaranteed. 7 t phl propagation delay is measured from the 5 0% level of the falling edge of the v ix signal to the 50% level of the falling edge of the v ox signal. t plh propagation delay is measured from the 50% level of the rising edge of the v ix signal to the 50% level of the rising edge of the v ox signal. 8 t psk is the magnitude of the worst - case difference in t phl and/or t plh that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 9 c hannel - to - channel matching is the absolute value of the difference in propagation delays between the two channels when operated with identical loads .
data sheet adum5240/adum5241/adum5242 rev. b | page 5 of 1 6 package characterist ics table 2 . parameter symbol min typ max unit test conditions resistance (input - to - output) r i - o 10 12 ? capacitance (input -to - ou tput) c i - o 1.0 pf f = 1 mhz input capacitance c i 4.0 pf ic junction - to - air thermal resistance ja 80 c/w regulatory informati on the adum524 x are approve d by the organizations listed in table 3 . refer to table 8 and the insulation lifetime section for details regarding recommended maximum working voltages for specific cross - isolation waveforms and insulation levels. table 3 . ul csa vde recognized under 1577 component recognition program 1 approved under csa component acceptance notice #5a certified according to din v vde v 0884 - 10 (vde v 0884 - 10) :2006 - 12 2 single/basic insulation, 2500 v rms isolation rating basic insul ation per csa 60950 - 1 - 03 and iec 60950 - 1, 400 v rms (566 v peak) maximum working voltage reinforced insulation, 560 v peak file e214100 file 205078 file 2471900 - 4880 - 0001 1 in accordance with ul 1577, each adum524x is proof - tested by applying an insulation test voltage 3000 v rms for 1 second (current leakage detecti on limit = 5 a) . 2 in accordance with din v vde v 0884 - 10 , each adum524x is proof - tested by applying an insulation test voltage 1050 v peak for 1 sec (partial discharge detection limit = 5 pc). the asterisk ( * ) marking branded on the component designat es din v vde v 0884 - 10 approval. insulation and safet y - related specificatio ns table 4 . pa rameter symbol value unit conditions rate d dielectric insulation voltage 2500 v rms 1 - minute duration minim um external air gap (clearance) l(i01) 4.90 min mm measured from input terminals to output terminals , shortest distance through air minimum external tra cking (creepage) l(i02) 4.01 min mm measured from input terminals to output terminals, shortest distance path along body minimum in ternal gap (internal clearance) 0.017 min mm insulation distance through insulation tracking resistance (compa rativ e tracking index) cti >175 v din iec 112/vde 0303 part 1 isolation group iiia material group (din vde 0110, 1/89, table 1) maximum working voltage compati ble with 50- year service life v iorm 425 v peak continuous peak voltage across the isolation barrier
adum5240/adum5241/adum5242 data sheet rev. b | page 6 of 16 din v vde v 0884-10 (vde v 0884-10) insulation characteristics this isolator is suitable for reinforced isolation only within the safety limit data. maintenance of the safety data is ensured by protective circuits. table 5. description conditions symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 150 v rms i to iv for rated mains voltage 300 v rms i to iii climatic classification 40/105/21 pollution degree (din vde 0110, table 1) 2 maximum working insulation voltage v iorm 424 v peak input-to-output test voltage, method b1 v iorm 1.875 = v pr , 100% production test, t m = 1 sec, partial discharge < 5 pc v pr 795 v peak input-to-output test voltage, method a v pr after environmental tests subgroup 1 v iorm 1.6 = v pr , t m = 60 sec, partial discharge < 5 pc 680 v peak after input and/or safety test subgroup 2 and subgroup 3 v iorm 1.2 = v pr , t m = 60 sec, partial discharge < 5 pc 510 v peak highest allowable overvoltage transient overvoltage, t tr = 10 seconds v tr 4000 v peak safety-limiting values maximum value allowed in the event of a failure; see figure 4 case temperature t s 150 c supply current i s1 312 ma insulation resistance at t s v io = 500 v r s >10 9 350 0 0200 06014-004 ambient temperature (c) safe operating v dd current (ma) 300 250 200 150 100 50 50 100 150 figure 4. thermal derating curve, dependence of safety-limiting values on case temperature, per din v vde v 0884-10 recommended operat ing conditions table 6. parameter value operating temperature range (t a ) ?40c to +105c supply voltages 1 v dd , dc-to-dc converter enabled 4.5 v to 5.5 v v dd , dc-to-dc converter disabled (v dd ) 2.7 v to 4.0 v v iso , dc-to-dc converter disabled (v iso ) 2.7 v to 5.5 v input signal rise/fall time 1.0 ms input supply slew rate 10 v/ms 1 all voltages are relative to their respective ground.
data sheet adum5240/adum5241/adum5242 rev. b | page 7 of 16 absolute maximum rat ings table 7 . para meter rating storage temperature range (t st ) ?55 c to + 150c ambient operating temperature range (t a ) ?40 c to + 105c supply voltages (v dd , v iso ) 1 ?0.5 v to + 7.0 v input voltage (v ia , v ib ) 1 ?0.5 v to (v dd or v iso ) + 0.5 v output voltage (v oa , v ob ) 1 ?0.5 v to (v dd or v iso ) + 0.5 v average output current per pin (i o ) 2 ?18 ma to +18 ma common - mode transients (|cm|) 3 ?100 kv/s to +100 kv/s 1 all voltages are relative to their respective ground. 2 see figure 4 for maximum rated current values for various temperatures. 3 refers to common - mode transients across the insulation barrier. common - mode transients exceeding the absolute maximum ratings may cause latch - up or permanent damage. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution table 8 . maximum continuous working voltage 1 parameter max unit constraint ac voltage, bipolar waveform 425 v peak 50- year minimum lifetime ac voltage, unipolar waveform basic insulation 566 v peak maximum approved working voltage per iec 60950 -1 reinforced insulation 560 v peak maximum approved working voltage per vde v 0884 -10 dc voltage basic insulation 566 v peak maximum approved working voltage per iec 60950 -1 reinforced insulation 560 v peak maximum approved working voltage per vde v 0884 -10 1 refers to continuous voltage magnitude imposed across the isolation barrier . see the insulation lifetime section for more details.
adum5240/adum5241/adum5242 data sheet rev. b | page 8 of 16 pin configuration s and function descrip tions 06014-009 v dd 1 v ia 2 v ib 3 gnd 4 v iso 8 v oa 7 v ob 6 gnd iso 5 adum5240 t op view (not to scale) figure 5 . adum5240 pin configuration table 9 . adum5240 pin functio n descriptions pin no. mnemonic description 1 v dd supply voltage for isolator primary s ide, 4.5 v to 5.5 v ( dc -to -dc enabled) and 2.7 v to 4.0 v ( dc -to -dc disabled) . 2 v ia logic input a. 3 v ib logic input b. 4 gnd ground. ground reference for isolato r primary sid e. 5 gnd iso isolated ground. ground reference for isolator secondary s ide. 6 v ob logic output b. 7 v oa logic output a. 8 v iso isolated supply voltage for isolator secondary s ide, 4.5 v to 5.5 v output ( dc -to -dc enabled), and 2.7 v to 5.5 v input ( dc - to -dc disabled) . 06014-010 v dd 1 v oa 2 v ib 3 gnd 4 v iso 8 v ia 7 v ob 6 gnd iso 5 adum5241 t op view (not to scale) figure 6 . adum5241 pin configuration table 10. adum5241 pin function descriptions pin no. mnemonic description 1 v dd supply voltage for isolator primary s ide, 4.5 v to 5.5 v ( dc -to -dc enabled) and 2.7 v to 4.0 v ( dc -to -dc disabled) . 2 v oa logic output a. 3 v ib logic input b. 4 gnd ground. ground reference for isolator primary side. 5 gnd iso isolated ground. ground reference for isolator secondary s ide. 6 v ob logic output b. 7 v ia logic input a. 8 v iso isolated supply voltage for isolator secondary s ide, 4.5 v to 5.5 v output ( dc -to -dc enabled), and 2.7 v to 5.5 v input ( dc - to -dc disabled) . 06014-0 1 1 v dd 1 v oa 2 v ob 3 gnd 4 v iso 8 v ia 7 v ib 6 gnd iso 5 adum5242 t op view (not to scale) figure 7 . adum5242 pin configuration table 11. adum5242 pin function descriptions pin no. mnemonic description 1 v dd supply voltage for isolator primary s ide, 4.5 v to 5.5 v ( dc -to -dc enabled) and 2.7 v to 4.0 v ( dc -to -dc disabled) . 2 v oa logic output a. 3 v ob logic out put b. 4 gnd ground. ground reference for isolator primary sid e. 5 gnd iso isolated ground. ground reference for isolator secondary si de. 6 v ib logic input b. 7 v ia logic input a. 8 v iso isolated supply voltage for isolator secondary s ide, 4.5 v to 5. 5 v output ( dc -to -dc enabled), and 2.7 v to 5.5 v input ( dc - to - dc disabled) .
data sheet adum5240/adum5241/adum5242 rev. b | page 9 of 16 table 12. adum5240 truth table v dd state dc - to - dc converter v iso state v ia input v ib input v oa output v ob output powered enabled powered (internally ) h h h h powered enabled powered (internally) l l l l powered enabled powered (internally) h l h l powered enabled powered (internally) l h l h powered disabled powered (externally) h h h h powered disabled powered (externally) l l l l powered disab led powered (externally) h l h l powered disabled powered (externally) l h l h powered disabled unpowered x x z z unpowered disabled powered (externally) x x l l unpowered disabled unpowered x x z z table 13. adum5241 truth ta ble v dd state dc - to - dc converter v iso state v ia input v ib input v oa output v ob output powered enabled powered (internally) h h h h powered enabled powered (internally) l l l l powered enabled powered (internally) h l h l powered enabled powered (inter nally) l h l h powered disabled powered (externally) h h h h powered disabled powered (externally) l l l l powered disabled powered (externally) h l h l powered disabled powered (externally) l h l h powered disabled unpowered x x l z unpowered disabl ed powered (externally) x x z l unpowered disabled unpowered x x z z table 14. adum5242 truth table v dd state dc - to - dc converter v iso state v ia input v ib input v oa output v ob output powered enabled powered (internally) h h h h powered enabled powered (internally) l l l l powered enabled powered (internally) h l h l powered enabled powered (internally) l h l h powered disabled powered (externally) h h h h powered disabled powered (externally) l l l l powered disabled powere d (externally) h l h l powered disabled powered (externally) l h l h powered disabled unpowered x x l l unpowered disabled powered (externally) x x z z unpowered disabled unpowered x x z z
adum5240/adum5241/adum5242 data sheet rev. b | page 10 of 16 typical performance characteristics 120 0 0 12 06014-005 i iso output load current (ma) i dd input current (ma) 2 4 6 8 10 100 80 60 40 20 figure 8. typical i dd input current vs . i iso output load current 5.5 4.5 0 12 06014-006 i iso output load current (ma) v iso output voltage (v) 5.4 5.3 5.2 5.1 5.0 4.9 4.8 4.7 4.6 2 4 6 8 10 figure 9 . typical isolated v iso output voltage vs . i iso output load current 100% ?50 0 35 06014-007 time (s) response to 90%-10%-90% load pulse (mv) 0 100 50 0 5 10 15 20 25 30 load figure 10 . typical v iso transient load response, 5 v output, 90% to 10% to 90% pulsed load, 100 nf b ypass c apacitance vs. time 200 ?200 0 100 06014-008 time (ns) v iso noise (mv) 150 100 50 0 ?50 ?100 ?150 20 40 60 80 figure 11 . typical output voltage noise at 100% load, 100 nf b ypass c apacitance vs. time
data sheet adum5240/adum5241/adum5242 rev. b | page 11 of 16 applications information dc-to-dc converter the dc-to-dc converter section of the adum524x works on principles that are common to most modern power supply designs. v dd power is supplied to an oscillating circuit that switches current into a chip scale air core transformer. power is transferred to the secondary side where it is rectified to a high dc voltage. the power is then linearly regulated down to about 5.2 v and supplied to the secondary side data section and to the v iso pin for external use. this design allows for a physically small power section compatible with the 8-lead soic packaging of this device. active feedback was not implemented in this version of iso power for reasons of size and cost. because the oscillator runs at a constant high frequency inde- pendent of the load, excess power is internally dissipated in the output voltage regulation process. limited space for transformer coils and components also adds to internal power dissipation. this results in low power conversion efficiency, especially at low load currents. the load characteristic curve in figure 8 shows that the v dd current is typically 80 ma with no v iso load and 110 ma at full v iso load at the v dd supply pin. alternate supply architectures are possible using this technology. addition of a digital feedback path allows regulation of power on the primary side. feedback would allow significantly higher power, efficiency, and synchronization of multiple supplies at the expense of size and cost. future implementations of iso power includes feedback to achieve these performance improvements. the adum524x can be operated with the internal dc-to-dc enabled or disabled. with the internal dc-to-dc converter enabled, the isolated supply of pin 8 provides the output power as well as power to the secondary-side circuitry of the part. the internal dc-to-dc converter state of the adum524x is controlled by the input v dd voltage, as defined in table 6. in normal operating mode, v dd is set between 4.5 v and 5.5 v and the internal dc-to-dc converter is enabled. when/if it is desired to disable the dc-to-dc converter, v dd is lowered to a value between 2.7 v and 4.0 v. in this mode, v iso power is supplied externally by the user and the signal channels of the adum524x continue to operate normally. there is hysteresis into the v dd input voltage detect circuit. once the dc-to-dc converter is active, the input voltage must be decreased below the turn-on threshold to disable the converter. this feature ensures that the converter does not go into oscillation due to noisy input power. propagation delay-related parameters propagation delay is a parameter that describes the time it takes a logic signal to propagate through a component. the propagation delay to a logic low output may differ from the propagation delay to a logic high. input ( v ix ) output (v ox ) t plh t phl 50% 50% 06014-012 figure 12. propagation delay parameters pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the timing of the input signal is preserved. channel-to-channel matching refers to the maximum amount the propagation delay differs between channels within a single adum524x component. propagation delay skew refers to the maximum amount the propagation delay differs between multiple adum524x components operating under the same conditions. dc correctness and magnetic field immunity positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent to the decoder via the transformer. the decoder is bistable and is, therefore, either set or reset by the pulses, indicating input logic transitions. in the absence of logic transitions at the input for more than 1 s, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. if the decoder receives no internal pulses of more than about 5 s, the input side is assumed to be unpowered or nonfunctional, in which case the isolator output is forced to a default state by the watchdog timer circuit (see table 12 through table 14). the limitation on the magnetic field immunity of the adum524x is set by the condition in which induced voltage in the receiving coil of the transformer is sufficiently large to either falsely set or reset the decoder. the following analysis defines the conditions under which this may occur. the 3 v operating condition of the adum524x is examined because it represents the most susceptible mode of operation. the pulses at the transformer output have an amplitude greater than 1.0 v. the decoder has a sensing threshold at about 0.5 v, thus establishing a 0.5 v margin in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by v = ( ?d/dt )? r n 2 ; n = 1, 2, , n where: is magnetic flux density (gauss). n is the number of turns in the receiving coil. r n is the radius of the n th turn in the receiving coil (cm).
adum5240/adum5241/adum5242 data sheet rev. b | page 12 of 16 given the geometry of the receiving coil in the adum524x and an imposed requirement that the induced voltage be at most 50% of the 0.5 v margin at the decoder, a maximum allowable magnetic field is calculated , as shown in figure 13. magnetic field frequency (hz) 100 maximum allowable magnetic flux density (kgauss) 0.001 1m 10 0.01 1k 10k 10m 0.1 1 100m 100k 06014-013 figure 13 . maximum allowable external m agnetic flux density for example, at a magnetic field frequency of 1 mhz, the maximum allowable magnetic field of 0.2 kgauss induces a vol t age of 0.25 v at the receiving coil. this is about 50% of the sen s ing threshold and does not cause a faulty output t ransition. sim i larly, if such an event were to occur during a transmitted pulse (and was of the worst - case polarity), it would reduce the r e ceived pulse from >1.0 v to 0.75 v still well above the 0.5 v sensing threshold of the decoder. the preceding magnet ic flux density values correspond to sp e cific current magnitudes at given distances from the adum524x transformers. figure 14 expresses these allowable current magnitudes as a function of frequency for selected di s tances. as show n in figure 14 , the adum524x is extremely immune and can only be affected by extremely large currents operated at high frequenc ies very close to the component. for the 1 mhz example noted, one would have to place a 0.5 ka current 5 mm away from the adum524x to affect the operation of the component . magnetic field frequency (hz) maximum allowable current (ka) 1000 100 10 1 0.1 0.01 1k 10k 100m 100k 1m 10m distance = 5mm distance = 1m distance = 100mm 06014-014 figure 14 . maximum allowable current for various current - to- adum 524 x spacings note that at combinations of strong magnetic field and high frequency, any loops f ormed by printed circuit board (pcb) traces could induce error voltages sufficiently large enough to trigger the thresholds of succeeding circuitry. care should be taken in the layout of such traces to avoid this possibility. thermal analysis each adum524x component consists of two internal die, attached to a split - paddle lead frame. for the purposes of thermal analysis , it is treated as a thermal unit with the highest juncti on temperature r eflected in the ja value in table 2 . the value of ja is based on measurements taken with the par t mounted on a jedec standard 4 - layer pcb with fine - width traces in still air. under normal operating conditions , the adum524x opera te s at full load across the full temperature range without derating the output current. for example, a part with no external load drawing 80 ma and dissipating 400 mw cause s a 32c temperature rise above ambient. it is normal for these devices to run warm. following the recommendations in the pcb layout section decrease s the thermal resistance to the pcb all owing increased thermal margin a t high ambient temperatures. pcb layout the adum524x requires no external circuitry for its lo gic interfaces. power supply bypassing is required at the input and output supply pins ( see figure 15 ). the power supply section of the adum524 x uses a 300 mhz oscillator frequency to pass power through its chip scale trans - form ers. in addition, the normal operation of the data section of the i coupler introduces switching transients, as described in the dc correctness and magnetic field imm u nity sec tion, on the power supply pins ( see figure 11) . low inductance capacitors are required to bypass noise generated at the switching frequency as well as 1 ns pulses generated by the data transfer and dc refresh circuitr y. the total lead length between bot h ends of the capacitor and the input power supply pin should not exceed 20 mm . in cases where emi emission is a concern, series inductance may be added to critical power and ground traces. discrete inductors should be added to the line such that the high frequency bypass capacitors are between the inductor and the adum524x device pin. inductance can be added in the form of discrete inductors or ferrite beads added to both power and ground traces. the recommended value corresponds to impedance between 50 ? and 100 ? at approximately 300 mhz. if the switching speed of the data outputs is causing unacceptable emi, capacitance to ground can be added at output pins to slow the rise and fall time of the output. this slew rate limits the output. capacitance values depend on application speed requirements. see the an - 0971 application note for board layout guidelines.
data sheet adum5240/adum5241/adum5242 rev. b | page 13 of 16 load regulation transients are the primary source of lower frequency power supply voltage excursions, as illustrated in figure 10. these should be dealt with by adding an additional supply stiffening capacitor between v iso and gnd iso . the stiffening capacitor can be of a more highly inductive type because the high frequency bypass is handled by the required low inductance capacitor. 06014-015 v dd v ia/oa v ib/ob gnd v iso v oa/ia v ob/ib gnd iso 100nf 100nf opt figure 15. recommended printed circuit board layout in applications involving high common-mode transients, care should be taken to ensure that board coupling across the isolation barrier is minimized. furthermore, the board layout should be designed such that any coupling that does occur equally affects all pins on a given component side. failure to ensure this can cause voltage differentials between pins exceeding the absolute maximum ratings of the device (specified in table 7), thereby leading to latch-up and/or permanent damage. the adum524x is a power device that dissipates as much as 600 mw of power when fully loaded. because it is not possible to apply a heat sink to an isolation device, the device primarily depends on heat dissipation into the pcb through the gnd pins. if the device is used at high ambient temperatures, care should be taken to provide a thermal path from the gnd pins to the pcb ground plane. the board layout in figure 15 shows enlarged pads for pin 4 and pin 5. multiple vias should be implemented from each of the pads to the ground plane, which significantly reduce the temperatures inside the chip. the dimensions of the expanded pads are left to the discretion of the designer and the available board space. increasing available power the adum524x devices are not designed with the capability of running several devices in parallel. however, if more power is required to run multiple loads, it is possible to group loads and run each group from an individual adum542x device. for example, if a transceiver and external logic must be powered, one adum524x could be dedicated to the transceiver and an additional adum524x could power the external logic, which prevents issues with load sharing because each load is dedicated to its own supply. insulation lifetime all insulation structures eventually breaks down when subjected to voltage stress over a sufficiently long period. the rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation. in addition to the testing performed by the regulatory agencies, analog devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure within the adum524x. analog devices performs accelerated life testing using voltage levels higher than the rated continuous working voltage. accel- eration factors for several operating conditions are determined. these factors allow calculation of the time to failure at the actual working voltage. the values shown in table 8 summarize the peak voltage for 50 years of service life for a bipolar ac operating condi- tion and the maximum csa/vde approved working voltages. in many cases, the approved working voltage is higher than 50-year service life voltage. operation at these high working voltages can lead to shortened insulation life in some cases. the insulation lifetime of the adum524x depends on the voltage waveform type imposed across the isolation barrier. the i coupler insulation structure degrades at different rates depending on whether the waveform is bipolar ac, unipolar ac, or dc. figure 16, figure 17, and figure 18 illustrate these different isolation voltage waveforms. bipolar ac voltage is the most stringent environment. the goal of a 50-year operating lifetime under the ac bipolar condition determines the recommended maximum working voltage of analog devices. in the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower, which allows operation at higher working voltages while still achieving a 50-year service life. the working voltages listed in table 8 can be applied while maintaining the 50-year minimum lifetime provided the voltage conforms to either the unipolar ac or dc voltage cases. any cross- insulation voltage waveform that does not conform to figure 17 or figure 18 should be treated as a bipolar ac waveform, and its peak voltage should be limited to the 50-year lifetime voltage value listed in table 8. note that the voltage presented in figure 17 is shown as sinusoidal for illustration purposes only. it is meant to represent any voltage waveform varying between 0 v and some limiting value. the limiting value can be positive or negative, but the voltage cannot cross 0 v. 0v rated peak voltage 06014-021 figure 16. bipolar ac waveform 0v rated peak voltage 06014-022 figure 17. unipolar ac waveform 0v rated peak voltage 06014-023 figure 18. dc waveform
adum5240/adum5241/adum5242 data sheet rev. b | page 14 of 16 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 19. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) ordering guide model 1 number of inputs, v dd side number of inputs, v iso side maximum data rate (mbps) temperature range package description package option adum5240arz 2 0 1 ?40c to +105c 8-lead soic_n r-8 adum5240arz-rl7 2 0 1 ?40c to +105c 8-lead soic_n, 7 tape and reel r-8 adum5241arz 1 1 1 ?40c to +105c 8-lead soic_n r-8 adum5241arz-rl7 1 1 1 ?40c to +105c 8-lead soic_n, 7 tape and reel r-8 adum5242arz 0 2 1 ?40c to +105c 8-lead soic_n r-8 ADUM5242ARZ-RL7 0 2 1 ?40c to +105c 8-lead soic_n, 7 tape and reel r-8 1 z = rohs compliant part.
data sheet adum5240/adum5241/adum5242 rev. b | page 15 of 16 notes
adum5240/adum5241/adum5242 data sheet rev. b | page 16 of 16 notes ? 2007 C 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06014 - 0 - 5/12 (b)

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